The present invention relates generally to integrated circuits and in particular the present invention relates to electrical probes used to test integrated circuits.
Integrated circuits are typically fabricated in a wafer of dies. Each die includes complex circuitry that will be separated from the die and further processed to allow for external electrical communication interconnects to the die. Because the die are complex, defects contained in the individual die can be severe and result in a die that is either scrap or requires some type of repair.
Further processing of a die which contains a severe defect can result in the loss of economic resources. That is, the cost of packaging a defective die is an unnecessary loss. A process of testing the integrated circuit die prior to packaging, therefore, is typically performed to identify die that should not be further processed. This test is commonly referred to as wafer probe test, or die test. During a probe test a number of electrically conductive probes are placed in contact with conductive locations on the die. A relatively complete electrical testing can be conducted using the electrical probes.
Traditional integrated circuit die were packaged using wire bonds to couple the electrical connections of the die to the external circuit environment. As such, wire bond pads were located along a periphery of the circuit die and test probes could approach the die from an angled position. The angled approach assisted in xe2x80x9cscratchingxe2x80x9d the test probe on the wire bond pads. The scratching action helped to break through any oxide layer which may have formed on the conductive layer. A lower resistance contact, therefore, could be provided between the probe and the conductive pad if the oxide layer were penetrated.
Changes in integrated circuit packaging techniques have resulted in the distribution of conductive pads over the surface of the integrated circuit die. For example, packaging techniques which use solder ball bonds to couple the die to a circuit board allow for the distribution of the conductive pads. In such techniques, a new solder bump structure is added on top of the pad to prepare it for packaging. As a result, test probes cannot approach a die from an angled position, but approach the die from a more vertical position. A layer of oxide located over the conductive bump, therefore, can increase a resistance between the pad and the probe than that experienced with prior generations of integrated circuit die. Further, pads which are covered in solder can create difficulties in probing.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for an integrated circuit probe which provides a reliable contact during probe operations.
In one embodiment, an integrated circuit test probe comprises a probe shaft, and a downwardly extending probe tip attached to a bottom end of the probe shaft. The probe tip has an elongated pyramid shape.
In another embodiment, an integrated circuit test probe comprises a probe shaft, and a downwardly extending probe tip attached to a bottom end of the probe shaft. The probe tip has a blade-shape and comprises first, second, third and fourth downwardly extending sides, the first, second, third and fourth downwardly extending sides are connected on a downward edge to form a blade ridge.
A method of testing an integrated circuit die is provided in one embodiment. The method comprises lowering a test probe onto a conductive pad located on the integrated circuit die, where a top surface of the conductive pad is covered with a layer of solder. The test probe comprises a probe shaft having an elbow, and a downwardly extending probe tip attached to a bottom end of the probe shaft, the probe tip has an elongated pyramid shape. A downward force is applied on the probe shaft, and the probe shaft is deflected such that a horizontal force is applied to the probe tip to create a cutting action between the probe tip and the layer of solder to penetrate the solder layer with the probe tip.